ISA 总线定义

Memory 16-bit Chip select (1 wait, 16-bit memory cycle)

D2

/IOCS16

I/O 16-bit chip select (1 wait, 16-bit I/O cycle)

D3

IRQ10

Interrupt Request 10

D4

IRQ11

Interrupt Request 11

D5

IRQ12

Interrupt Request 12

D6

IRQ15

Interrupt Request 15

D7

IRQ14

Interrupt Request 14

D8

/DACK0

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DMA Acknowledge 0

D9

DRQ0

DMA Request 0

D10

/DACK5

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DMA Acknowledge 5

D11

DRQ5

DMA Request 5

D12

/DACK6

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DMA Acknowledge 6

D13

DRQ6

DMA Request 6

D14

/DACK7

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DMA Acknowledge 7

D15

DRQ7

DMA Request 7

D16

+5 V

　

　

D17

/MASTER

Used with DRQ to gain control of system

D18

GND

　

Ground

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