; bafhcdeg
;**********************************
;delay
;********************************
timer_1ms:
mov t_1ms,#030h
r2_1:
djnz t_1ms , r2_1
ret
timer_20ms:
mov t_20m,#050d
r2_2:
call clock
call led
djnz t_20m , r2_2
call week_auto
call al_out
ret
;#############################################
;if mon<=2 and year=4Z(0,1,2,3...)
;gs1=>week=mod([5/4]*year+mon_asc(mon)+day-1)/7
;else
; gs2=>week=mod([5/4]*year+mon_asc(mon)+day)/7
week_auto:
mov a,YEAR
mov b,#05
mul ab
mov r4,b
mov r5,a
mov r7,#04
call mul_2
MOV DPTR,#MON_ASC
MOV A,MON
dec a
MOVC A,@A+DPTR
ADD A,r3
;*********************
MOV B,DAY
ADD A,B
mov r3,a;r3=gs2
;*******jb mon<=2 ******
MOV A,MON
CJNE A,#02D,WEEK_1
SJMP WEEK_2
WEEK_1:
JC WEEK_2
week_3:
mov a,r3
mov b,#07
div ab
mov a,b
sjmp week_4
WEEK_2:
;*****jb year=4N ******
mov a,year
mov b,#04
div ab
mov a,b
jnz week_3
mov a,r3
dec a
mov b,#07
div ab
mov a,b
week_4:
MOV WEEK,a
jnz week_end
mov week,#07h
week_end:
RET
MON_ASC:
DB 6d, 2d, 2d, 5d, 0d, 3d, 5d, 1d, 4d, 6d, 2d, 4d ;2002.5.5
;r4r5/r7=r3
mul_2:
D457: CLR C
MOV A,R4
SUBB A,R7
JC DV50
SETB OV
RET
DV50: MOV R6,#8 ;；求平均值（R4R5／R7－→R3）
DV51: MOV A,R5
RLC A
MOV R5,A
MOV A,R4
RLC A
MOV R4,A
MOV F0,C
CLR C
SUBB A,R7
ANL C,/F0
JC DV52
MOV R4,A
DV52: CPL C
MOV A,R3
RLC A
MOV R3,A
DJNZ R6,DV51
MOV A,R4 ;；四舍五入
ADD A,#0;R4
JC DV53
SUBB A,R7
JC DV54
DV53: INC R3
DV54: CLR OV
RET
;*************************************************************
clr_ram:
MOV R7,#78h ;
MOV R0,#0bH ;
CLR A ;
CR: INC R0 ;
MOV @R0,A ;
djnz r7,cr ;CLR RAM
ret
;************** INT_CTRL
int_t0:
setb et1
MOV TMOD,#00010001b ;
mov w_adj,#w_adj_dat
setb ea
jmp adj_w
;**********************************************
al_led:
mov r0,#al1_h
mov a,stat_work
dec a
rl a
add a,r0
mov r0,a
mov a,@r0
acall bcd_8
mov led2,a
jnz al_1
mov led2,#blk_led
al_1:
mov a,b
add a,#10d
mov led3,a
inc r0
mov a,@r0
acall bcd_8
add a,#10d
mov led4,a
mov led5,b
al_led_end:
ret
;********************************
set_clk_al:
jnb set_clk_f,see1
call set_clock
clr set_clk_f
sjmp see2
see1:
jnb set_al4_f,see2
call set_al4
clr set_al4_f
see2:
ret
;*********************************
proc led_t_d
led_t_d:
mov dptr,#led_ord_3
mov b,#02h
mul ab
jmp @a+dptr
led_ord_3: ajmp led_k0_2
ajmp led_k1_2
ajmp led_k2_2
ajmp led_k3_2
ajmp led_k4_2
led_k0_2: ; timer_12 and date to led
acall time_12
jnb fl_3s ,lk1
acall date_led
lk1:
ajmp led_jmp_5_end
led_k1_2: ; timer_12 to led
acall time_12
ajmp led_jmp_5_end
led_k2_2: ;timer_24and date to led
acall time_24
jnb fl_3s ,lk2
acall date_led
lk2:
ajmp led_jmp_5_end
led_k3_2: ;timer_24to led
acall time_24
ajmp led_jmp_5_end
led_k4_2: ;sec to led
mov led1,#blk_led
mov led2,#blk_led
mov led3,#dot_led
mov a,sec
acall bcd_8
add a,#10d
mov led4,a
mov led5,b
led_jmp_5_end:
ret
end
;****************************************
proc set_al4
set_al4:
mov k1_data,#01d
mov k2_data,#01d
clr set_over
acall led_al
acall key_bord
call sf_key
mov key_data,#0
mov frist,#0
set_al41:
call clock
call week_auto
acall led_al
acall key_bord
call key_del
acall key_al
jnb set_over,set_al41
clr a
mov k1_data,a
mov k2_data,a
mov key_data,a
mov frist,a
ret
end
;**************************************
proc key_al
key_al:
mov a,key_data
jz key_al_end
cjne a,#01d,k2_al
inc k1_data ;(1-9)
mov a,k1_data
cjne a,#19d,key_al_end
mov k1_data,#01d
sjmp key_al_end
k2_al:
mov a,k1_data
cjne a,#018d,ke2
setb set_over
sjmp key_al_end
ke2:
mov r0,#al1_h
dec a
add a,r0
mov r0,a
inc @r0
acall jj_bit
mov b,#24d
jnz ke3
mov b,#60d
ke3:
mov a,@r0
div ab
mov a,b
mov @r0,a
key_al_end:
ret
end
jj_bit:
mov a,k1_data
mov b,#02d
div ab
mov a,b ;(a=1,0)
ret
;*********************************
led_out1:
mov led2,#00h
mov led3,#u_led
mov led4,#t_led
mov led5,#blk_led
mov led1,#blk_led
ret
;********************************
led_al:
mov a,k1_data
cjne a,#017d,lo1
acall beep_timer
sjmp led_al_end
lo1:
cjne a,#18d,ld1
acall led_out1
sjmp led_al_end
ld1:
inc a
mov b,#02d
div ab
;**********
mov led1,a
;**********
dec a
rl a
mov r0,#al1_h
add a,r0
mov r0,a
mov a,@r0
acall bcd_8
mov led2,a
jnz ld2
mov led2,#blk_led
ld2:
mov a,b
add a,#10d
mov led3,a
;************************************
inc r0
mov a,@r0
acall bcd_8
add a,#10d
mov led4,a
mov led5,b
;***************************flash bit
jb fl_250ms,led_al_end
acall jj_bit
jnz led_al_e
mov led4,#blk_led
mov led5,#blk_led
sjmp led_al_end
led_al_e:
mov led2,#blk_led
mov led3,#blk_led
led_al_end:
acall led
ret
;***************************************
proc set_clock
set_clock:
mov k1_data,#01d
mov k2_data,#01d
clr set_over
call led_cl
call key_bord
call sf_key
mov key_data,#0
mov frist,#0
set_al41:
call clock
acall week_auto
call al_out
acall led_cl
acall key_bord
call key_del
acall key_cl
jnb set_over,set_al41
;acall key_bord
clr a
mov k1_data,a
mov k2_data,a
mov key_data,a
mov frist,a
ret
end
;**************************************
proc key_cl
key_cl:
mov a,key_data
jz key_al_end
cjne a,#01d,k2_al
inc k1_data ;(1-8)
mov a,k1_data
cjne a,#9d,key_al_end
mov k1_data,#01d
sjmp key_al_end
k2_al:
mov a,k1_data
cjne a,#08d,ke2
setb set_over
sjmp key_al_end
ke2:
dec a
mov dptr,#asc_h
movc a,@a+dptr
mov b,a
;********************************
mov r0,#sec
mov a,k1_data
dec a
add a,r0
mov r0,a
inc @r0
mov a,@r0
div ab
mov a,b
mov @r0,a
key_al_end:
ret
end
asc_h:
db 60d,60d,24d,32d,13d,100d,100d
proc led_cl
led_cl:
mov dptr,#led_ord_3
mov a,k1_data
dec a
mov b,#02h
mul ab
jmp @a+dptr
led_ord_3: ajmp led_k0_2
ajmp led_k1_2
ajmp led_k2_2
ajmp led_k3_2
ajmp led_k4_2
ajmp led_k5_2
ajmp led_k6_2
ajmp led_k7_2
led_k0_2: ; led sec
mov led2,#blk_led
mov led3,#dot_led
mov a,sec
acall bcd_8
add a,#10d
mov led4,a
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