Hendon IES5502总线缓冲解决方案_电子技术

Hendon IES5502总线缓冲解决方案

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Hendon公司的IES5502总线缓冲器,它和I2C, SMBus, PMbus以及其它相似的2线总线系统兼容,具有能检测到停止和空闲条件的热插入,预先加压和非常低的输入到输出的失调电压,从而增加了缓冲器级联和系统的可靠性,广泛应用各种通信系统, 辐射状的IPMB架构,电源管理系统,背板管理/互连,台式和手提计算机,汽车电子以及Compact PCIRExpress.本文介绍了IES5502的主要特性, 方框图, 典型的应用框图以及在背板中的应用方框图.

The IES5502 bus buffer is compatible for extending I2C, SMBus, PMbus and other similar 2-wire bus systems where hot insertion into live backplanes and optimum performance is required. They feature hot insertion logic for detecting stop and idle conditions, pre-charge and a very low input to output offset voltages, allowing buffer cascading and increasing system reliability.

The IES5502 significantly increase system noise margins on the intelligent platform management bus (IPMB) and are excellent for implementing cost effective IPMB architectures.

The IES5502 bus buffer extends the bus load limit by buffering both the Clock (SCL) and Data (SDA) lines. It supports up to 400 pF loads on each side of the buffer at 400kHz. Higher capacitance is supported at lower speeds, and lower capacitance at higher speeds up to 1MHz. The unique operation of the IES5502 provides one of the fastest response times of such bi-directional buffers, ensuring any glitches (common to other buffers) are kept well within the 50 ns I2C specification.

The wide allowable voltage range expands their potential in ATCA and CompactPCI power management systems, backplane management systems and for bus voltage level translation (1.8V to 15V).

图1. IES5502方框图

主要特性:
Dual bi-directional unity gain buffer
Hot insertion logic prevents data and clock bus corruption for live backplane applications
Pre-charge minimizes data corruption on live insertion
Open collector ready output
Fully I2C compliant & supports a wide range of 2-wire standards
Doesn’t impose additional restrictions on logic levels
Very low input to output offset voltages
Multiple bus buffers allowed in cascade, multi-drop or “daisy chain” fashion
Compatible with all other classes of 2-wire bus buffer
Wide range of allowed bus voltages (1.8V to 15V)
Level shifting between bus voltages (1.8V to 15V)
Superior response times
Plugs in to live backplanes
Chip enable allows bus disconnection
No minimum bus capacitance requirement
Low current stand-by mode when not enabled Application/removal of power to IC will not interfere with other bus activity
Available in SO-8 and MSOP-8

IES5502主要应用:
Telecommunications Systems (inc. ATCATM)
Radial IPMB architectures
Power Management System
Backplane Management / Interconnect
Desktop and Portable Computers (inc. RAID)
Compact PCIRExpress
2-Wire Bus Switch/Multiplexing Applications
Automotive Accessories (up to 15V)
Building Automation
TV / Projector / Monitor interconnection
Game Consoles / Boxes
TV / Projector / Monitor interconnection
Game Consoles / Boxes
Gaming Machine Networks

图2.IES5502 典型缓冲器应用框图

图3.ES5502在背板中的应用

图4.和IES5501一起,IES5502在AdvancedTCA的应用