义隆单片机PT2262无线解码程序

#define ROC_ENABLE                                    0x01
#define ROC_DISABLE                                   0x00
#define EIS_IO                                        0x00
#define EIS_INT                                       0x40



/*****************************************************
*            INTERRUPT MASK REGISTER                 *
*****************************************************/
#define IMR_TCC                                       (u8)0X01
#define IMR_ICI                                       (u8)0x02
#define IMR_EXT                                       (u8)0x04
#define IMR1_ALL_DISABLE                              (u8)0x00
#define IMR1_ALL_ENABLE                               (u8)0xFF                 
/****************************************************/


#endif

EM78x156xx.H

/****************************************************
 *    Header file for the Elan                         *
 *    EM78P156E Chip                                    *
 *    EM78P156N chip                                    *
 *  Title: EM78X156 include file                    *
 *    Description: The Definition of EM78x156            *
 *                 Registers and Bits                 *
 *    Company: ELAN MICROELECTRONICS (SZ) LTD.        *
 *    Author:    HongXi.Tang                                *
 *    Date: 10/05/2005                                *
 *    Version: v1.0                                    *
 ****************************************************/
 
static unsigned int TCC     @0x01:rpage 0;
static unsigned int PC      @0x02:rpage 0;
static unsigned int STATUS  @0x03:rpage 0;
static unsigned int RSR     @0x04:rpage 0;
static unsigned int PORT5   @0x05:rpage 0;
static unsigned int PORT6   @0x06:rpage 0;
static unsigned int ISR        @0x0F:rpage 0;
 
/*======================================================;
;  Special Purpose Registers Define                     ;
; ======================================================;
;
; A: Accumulator
; It can’t be addressed.
;
; CONT: Control Register
;
     ;{                       
                              ; bit 7 not used
         mINT     ==  0x40    ; Interrupt enable flag
                              ; "0" : Masked by DISI or hardware interrupt
                              ; "1" : Enabled by ENI/RETI instructions
         mTS      ==  0x20    ; TCC signal source
                              ; "0" : Internal instruction cycle clock

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